Frequently in digital signal processing systems it is necessary to multiply a whole number by a fractional number. The precision of the product will be no better than the precision of the whole number. The bit width of the product and thus the bit width of the multiplier circuit will be equal to the sum of the number of bits in the multiplier and the multiplicand. However, in general, the product need not be expressed with any more bits than the number of bits in the multiplicand plus one.
For convenience in assembling processing hardware fractional numbers are frequently converted to floating point format to reduce the number of connections required. In this instance calculations are performed using nonfractional numbers with the results ultimately being properly justified and truncated to the requisite precision. An example of this type of circuitry may be found in digital television receiver circuitry for adjusting the hue or color. In this circuitry signal magnitudes representing color difference signals are multiplied by correction factors in the form of sines and cosines to produce appropriate color vectors. The fractional values representing the sines and cosines are typically provided by memory circuits programmed to provide the sines and cosines multiplied by 2.sup.R where R is equal to the number of bits that would be used to represent a fractional sine or cosine. The multiplied sines and cosines are thus provided as whole numbers which are then utilized in the correction circuitry. Note however, that if a fraction of X-bit precision is placed in floating point form to multiply a whole number of X bit precision, the product will be a 2X bit number before proper justification and truncation. Thus, regardless of whether or not an X-bit fraction is placed in floating point format for multiplying an X-bit whole number typical multiplier circuits provide 2X-bit products.
It is an object of this invention to provide a multiplier for multiplying a whole number by a floating point fraction which requires minimum circuitry and produces a properly justified and truncated product of precision equal to that of the whole number.
In addition it is frequently desired to generate the product of a first number times an X-bit second number, which product is scaled by 2.sup.-(X-1). It is a further object of the invention Lo provide a simple multiplier to provide this compound function.